77 search results - page 7 / 16 » Guarded Fixed Point Logic |
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
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AAAI
2012
13 years 2 months ago
2012
We tackle the problem of defining a well-founded semantics (WFS) for Datalog rules with existentially quantified variables in their heads and negations in their bodies. In partic...
CORR
2008
Springer
14 years 11 months ago
2008
Springer
Existential fixed point logic (EFPL) is a natural fit for some applications, and the purpose of this talk is to attract attention to EFPL. The logic is also interesting in its own ...
DAC
2008
ACM
16 years 20 days ago
2008
ACM
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. We study an FPGA architecture with a dual voltage s...
ACSC
2004
IEEE
15 years 3 months ago
2004
IEEE
Table 1 shows the payoff to player one. The same matrix also holds for player two. Player one can gain the maximum 5 points (T = 5) by defection if player two cooperates. However,...