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DAC
2004
ACM
16 years 5 months ago
Worst-case circuit delay taking into account power supply variations
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm
127
Voted
CORR
2010
Springer
139views Education» more  CORR 2010»
15 years 2 months ago
Centrality Metric for Dynamic Networks
Centrality is an important notion in network analysis and is used to measure the degree to which network structure contributes to the importance of a node in a network. While many...
Kristina Lerman, Rumi Ghosh, Jeon Hyung Kang
TRUSTBUS
2009
Springer
15 years 10 months ago
Operational Semantics for DKAL: Application and Analysis
DKAL is a new expressive high-level authorization language. It has been successfully tried at Microsoft which led to further improvements of the language itself. One improvement is...
Yuri Gurevich, Arnab Roy
VTS
1996
IEEE
114views Hardware» more  VTS 1996»
15 years 8 months ago
Quantitative analysis of very-low-voltage testing
Some weak static CMOS chips can be detected by testing them with a very low supply voltage -- between 2 and 2.5 times the threshold voltage Vt of the transistors. A weak chip is o...
Jonathan T.-Y. Chang, Edward J. McCluskey
NDSS
2008
IEEE
15 years 10 months ago
Automated Whitebox Fuzz Testing
Fuzz testing is an effective technique for finding security vulnerabilities in software. Traditionally, fuzz testing tools apply random mutations to well-formed inputs of a progr...
Patrice Godefroid, Michael Y. Levin, David A. Moln...