495 search results - page 39 / 99 » HIDE : A Logic Based Hardware Development Environment |
107
click to vote
ICCAD
2006
IEEE
15 years 7 months ago
2006
IEEE
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
ICCAD
2000
IEEE
15 years 3 months ago
2000
IEEE
This paper presents new test generation techniques for improving the average-case performance of the iterative logic array based deterministic sequential circuit test generation a...
ICCAD
1994
IEEE
15 years 3 months ago
1994
IEEE
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...
108
click to vote
UML
2004
Springer
15 years 4 months ago
2004
Springer
This paper discusses a model-based design flow for requirements in distributed embedded software development. Such requirements are specified using a language similar to Linear T...
ICCAD
1994
IEEE
15 years 3 months ago
1994
IEEE
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrou...