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» HOLCF: Higher Order Logic of Computable Functions
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DATE
2002
IEEE
89views Hardware» more  DATE 2002»
15 years 5 months ago
Generalized Early Evaluation in Self-Timed Circuits
Phased logic has been proposed as a technique for realizing self-timed circuitry that is delay-insensitive and requires no global clock signals. Early evaluation techniques have b...
Mitchell A. Thornton, Kenneth Fazel, Robert B. Ree...
115
Voted
MJ
2007
119views more  MJ 2007»
14 years 12 months ago
Automated energy calculation and estimation for delay-insensitive digital circuits
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
Venkat Satagopan, Bonita Bhaskaran, Anshul Singh, ...
128
Voted
JAR
2008
105views more  JAR 2008»
15 years 13 days ago
Proof Synthesis and Reflection for Linear Arithmetic
This article presents detailed implementations of quantifier elimination for both integer and real linear arithmetic for theorem provers. The underlying algorithms are those by Coo...
Amine Chaieb, Tobias Nipkow
99
Voted
ENTCS
2002
113views more  ENTCS 2002»
15 years 8 days ago
An Operational Semantics for Declarative Multi-Paradigm Languages
Practical declarative multi-paradigm languages combine the main features of functional, logic and concurrent programming (e.g., laziness, sharing, higher-order, logic variables, n...
Elvira Albert, Michael Hanus, Frank Huch, Javier O...
123
Voted
TPHOL
2002
IEEE
15 years 5 months ago
Free-Style Theorem Proving
g Higher Order Abstract Syntax with Tactical Theorem Proving and (Co)Induction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 ...
David Delahaye