Phased logic has been proposed as a technique for realizing self-timed circuitry that is delay-insensitive and requires no global clock signals. Early evaluation techniques have b...
Mitchell A. Thornton, Kenneth Fazel, Robert B. Ree...
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
This article presents detailed implementations of quantifier elimination for both integer and real linear arithmetic for theorem provers. The underlying algorithms are those by Coo...
Practical declarative multi-paradigm languages combine the main features of functional, logic and concurrent programming (e.g., laziness, sharing, higher-order, logic variables, n...
Elvira Albert, Michael Hanus, Frank Huch, Javier O...