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» HOLCF: Higher Order Logic of Computable Functions
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VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
15 years 3 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
92
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FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
15 years 1 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson
HPCA
2009
IEEE
15 years 10 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
CODES
2008
IEEE
14 years 11 months ago
Design and defect tolerance beyond CMOS
It is well recognized that novel computational models, devices and technologies are needed in order to sustain the remarkable advancement of CMOS-based VLSI circuits and systems. ...
Xiaobo Sharon Hu, Alexander Khitun, Konstantin K. ...
92
Voted
CIBCB
2007
IEEE
15 years 3 months ago
Modeling protein-DNA binding time in Stochastic Discrete Event Simulation of Biological Processes
Abstract— This paper presents a parametric model to estimate the DNA-protein binding time using the DNA and protein structures and details of the binding site. To understand the ...
Preetam Ghosh, Samik Ghosh, Kalyan Basu, Sajal K. ...