During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
It is well recognized that novel computational models, devices and technologies are needed in order to sustain the remarkable advancement of CMOS-based VLSI circuits and systems. ...
Xiaobo Sharon Hu, Alexander Khitun, Konstantin K. ...
Abstract— This paper presents a parametric model to estimate the DNA-protein binding time using the DNA and protein structures and details of the binding site. To understand the ...
Preetam Ghosh, Samik Ghosh, Kalyan Basu, Sajal K. ...