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» HPP Switch: A Novel High Performance Switch for HPC
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TCAD
2010
105views more  TCAD 2010»
13 years 1 months ago
Fault Tolerant Network on Chip Switching With Graceful Performance Degradation
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
Adán Kohler, Gert Schley, Martin Radetzki
HOTI
2002
IEEE
13 years 11 months ago
Stable Round-Robin Scheduling Algorithms for High-Performance Input Queued Switches
High-performance input-queued switches require highspeed scheduling algorithms while maintaining good performance. Various round-robin scheduling algorithms for Virtual Output Que...
Jing Liu, Chun Kit Hung, Mounir Hamdi, Chi-Ying Ts...
INFOCOM
2002
IEEE
13 years 11 months ago
Design of Wavelength Converting Switches for Optical Burst Switching
— Optical Burst Switching (OBS) is an experimental network technology that enables the construction of very high capacity routers, using optical data paths and electronic control...
Jeyashankher Ramamirtham, Jonathan S. Turner
ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
13 years 10 months ago
A novel high gain, high bandwidth CMOS differential front-end for wireless optical systems
This paper describes a high performance CMOS differential input front-end, designed for optical wireless communications. The front-end achieves a 50 MHz bandwidth and a 400 K tran...
E. de Vasconcelos, J. L. Cura, Rui L. Aguiar, Dini...
ICC
2008
IEEE
126views Communications» more  ICC 2008»
14 years 24 days ago
Backlog Aware Scheduling for Large Buffered Crossbar Switches
—A novel architecture was proposed in [1] to address scalability issues in large, high speed packet switches. The architecture proposed in [1], namely OBIG (output buffers with i...
Aditya Dua, Benjamin Yolken, Nicholas Bambos, Wlad...