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CHARME
2003
Springer
196views Hardware» more  CHARME 2003»
15 years 11 months ago
Analyzing the Intel Itanium Memory Ordering Rules Using Logic Programming and SAT
We present a non-operational approach to specifying and analyzing shared memory consistency models. The method uses higher order logic to capture a complete set of ordering constra...
Yue Yang, Ganesh Gopalakrishnan, Gary Lindstrom, K...
MICRO
2002
IEEE
113views Hardware» more  MICRO 2002»
15 years 11 months ago
Vacuum packing: extracting hardware-detected program phases for post-link optimization
This paper presents Vacuum Packing, a new approach to profile-based program optimization. Instead of using traditional aggregate or summarized execution profile weights, this ap...
Ronald D. Barnes, Erik M. Nystrom, Matthew C. Mert...
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
16 years 3 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
SSS
2009
Springer
163views Control Systems» more  SSS 2009»
16 years 1 months ago
Developing Autonomic and Secure Virtual Organisations with Chemical Programming
This paper studies the development of autonomic and secure Virtual Organisations (VOs) when following the chemical-programming paradigm. We have selected the Higher-Order Chemical ...
Alvaro E. Arenas, Jean-Pierre Banâtre, Thier...
145
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ICASSP
2008
IEEE
16 years 29 days ago
Discriminative training by iterative linear programming optimization
In this paper, we cast discriminative training problems into standard linear programming (LP) optimization. Besides being convex and having globally optimal solution(s), LP progra...
Brian Mak, Benny Ng