550 search results - page 24 / 110 » Hardware Accelerated Power Estimation |
113
Voted
ICCD
2005
IEEE
16 years 19 days ago
2005
IEEE
Consideration of pairs of transition in probabilistic simulation allows power estimation for digital circuits in which inertial delays can filter glitches [5]. However, the merit ...
129
Voted
ASAP
2004
IEEE
15 years 7 months ago
2004
IEEE
Distributed local memories, or scratchpads, have been shown to effectively reduce cost and power consumption of application-specific accelerators while maintaining performance. Th...
160
Voted
VTC
2010
IEEE
15 years 2 months ago
2010
IEEE
—In this paper we present an architectural analysis of a smart DMA (sDMA) controller for protocol stack acceleration in mobile devices supporting 3GPP’s Long Term Evolution (LT...
121
Voted
ASAP
2009
IEEE
16 years 26 days ago
2009
IEEE
—This paper describes the acceleration of virtual ecology models using field-programmable gate arrays (FPGAs). Our approach targets models generated by the Virtual Ecology Workb...
95
Voted
ISCAS
2006
IEEE
15 years 9 months ago
2006
IEEE
In this paper, we propose a cost-effective reconfigurable accelerator for the platform-based system-on-a-chip (SoC) design. Based on the proposed design methodology, the reconfigu...