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» Hardware Accelerated Power Estimation
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112
Voted
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
15 years 7 months ago
Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)
- TOSHIBA has developed mobile multi-media engine SoC, we call as S1G, which can realize low power ISDB-T one-segment decode in 42mW for eight months short period of time. Since MP...
K. Mori, M. Suzuki, Y. Ohara, S. Matsuo, A. Asano
113
Voted
FPL
2006
Springer
118views Hardware» more  FPL 2006»
15 years 7 months ago
Activity Estimation for Field-Programmable Gate Arrays
This paper examines various activity estimation techniques in order to determine which are most appropriate for use in the context of field-programmable gate arrays (FPGAs). Speci...
Julien Lamoureux, Steven J. E. Wilton
142
Voted
ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
15 years 1 months ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
126
Voted
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
15 years 10 months ago
Accurate temperature-dependent integrated circuit leakage power estimation is easy
— It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, a...
Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Ya...
133
Voted
ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
15 years 7 months ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha