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128
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CODES
2005
IEEE
15 years 9 months ago
Future processors: flexible and modular
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
Charlie Johnson, Jeff Welser
124
Voted
ISLPED
1997
ACM
114views Hardware» more  ISLPED 1997»
15 years 7 months ago
Cycle-accurate macro-models for RT-level power analysis
 In this paper we present a methodology and techniques for generating cycle-accurate macro-models for RTlevel power analysis. The proposed macro-model predicts not only...
Qinru Qiu, Qing Wu, Massoud Pedram, Chih-Shun Ding
165
Voted
ISPD
2012
ACM
248views Hardware» more  ISPD 2012»
13 years 11 months ago
A fast estimation of SRAM failure rate using probability collectives
Importance sampling is a popular approach to estimate rare event failures of SRAM cells. We propose to improve importance sampling by probability collectives. First, we use “Kul...
Fang Gong, Sina Basir-Kazeruni, Lara Dolecek, Lei ...
143
Voted
IJSNET
2008
118views more  IJSNET 2008»
15 years 3 months ago
Public key cryptography empowered smart dust is affordable
: Public key cryptography (PKC) has been considered for a long time to be computationally too expensive for small battery powered devices. However, PKC turned out to be very benefi...
Steffen Peter, Peter Langendörfer, Krzysztof ...
107
Voted
ASPDAC
2000
ACM
102views Hardware» more  ASPDAC 2000»
15 years 8 months ago
A hybrid approach for core-based system-level power modeling
Reducing power consumption has become a key goal for systemon-a-chip (SOC) designs. Fast and accurate power estimation is needed early in the design process, since power reduction...
Tony Givargis, Frank Vahid, Jörg Henkel