550 search results - page 43 / 110 » Hardware Accelerated Power Estimation |
103
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ISCAS
2008
IEEE
15 years 10 months ago
2008
IEEE
— This paper presents models for estimating the transition activity of signals at the output of adders in Field Programmable Gate Arrays (FPGAs), given only word-level measures o...
148
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DAC
1997
ACM
15 years 7 months ago
1997
ACM
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
123
Voted
ISCAS
2007
IEEE
15 years 10 months ago
2007
IEEE
Abstract— This paper quantifies the impact of threshold voltage variation on aging-related hard failure rates in a highperformance 65nm processor. Simulations show that threshol...
136
Voted
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
In this paper the concept of a reconfigurable hardware macro to be used as a generic building block in lowpower, low-cost SoC for multioperable GNSS positioning is described, feat...
118
Voted
ISLPED
1999
ACM
15 years 8 months ago
1999
ACM
Abstract – In this paper, we propose a modeling approach for the average power consumption of macro-blocks that are typically used in digital signal processing (DSP) systems, suc...