The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nann...
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
Various multimedia communication systems based on 3DAudio algorithms have been proposed by researchers from the acoustic data processing domain. However, all systems reported in t...
Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi G...
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...