550 search results - page 62 / 110 » Hardware Accelerated Power Estimation |
152
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ISSS
2000
IEEE
15 years 8 months ago
2000
IEEE
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
122
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ISCAS
2003
IEEE
15 years 8 months ago
2003
IEEE
∑= += N i firiT 1 0 )( ττ (1) This paper presents a time-domain method for estimating the jitter in ring oscillators that is due to power supply noise. The method is used to a...
170
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ICCD
2008
IEEE
16 years 15 days ago
2008
IEEE
— Run-time Active Leakage Reduction (RALR) is a recent technique and aims at aggressively reducing leakage power consumption. This paper studies the feasibility of RALR from the ...
112
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ICCAD
2002
IEEE
16 years 13 days ago
2002
IEEE
In macromodeling-based power estimation, circuit macromodels are created from simulations of synthetic input vector sequences. Fast generation of these sequences with all possible...
132
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ASPDAC
2005
ACM
15 years 5 months ago
2005
ACM
— Power gating is a circuit technique that enables high performance and low power operation. One of the challenges in power gating is sizing the sleep transistor which is used to...