550 search results - page 78 / 110 » Hardware Accelerated Power Estimation |
118
Voted
ASAP
2007
IEEE
15 years 9 months ago
2007
IEEE
Currently, television sets with flat plasma and LCD screens with improved resolutions and better color quality are emerging. To fully utilize their capabilities, lower resolution...
110
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ISPAN
2005
IEEE
15 years 9 months ago
2005
IEEE
Within the parallel computing domain, field programmable gate arrays (FPGA) are no longer restricted to their traditional role as substitutes for application-specific integrated...
132
Voted
SIGGRAPH
2010
ACM
15 years 8 months ago
2010
ACM
We present a deblurring algorithm that uses a hardware attachment coupled with a natural image prior to deblur images from consumer cameras. Our approach uses a combination of ine...
142
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FPL
2010
Springer
15 years 1 months ago
2010
Springer
Abstract--Modular multiplication of long integers is an important building block for cryptographic algorithms. Although several FPGA accelerators have been proposed for large modul...
107
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DATE
2009
IEEE
15 years 10 months ago
2009
IEEE
— Memories are increasingly dominating Systems on Chip (SoC) designs and thus contribute a large percentage of the total system’s power dissipation, area and reliability. In th...