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» Hardware Accelerated Power Estimation
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122
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ISCAS
2006
IEEE
129views Hardware» more  ISCAS 2006»
15 years 9 months ago
Computing during supply voltage switching in DVS enabled real-time processors
In recent times, much attention has been devoted to power optimization for real-time systems, while guaranteeing that such systems meet their hard (or soft) scheduling deadlines. ...
Chunjie Duan, Sunil P. Khatri
88
Voted
ISCAS
2007
IEEE
105views Hardware» more  ISCAS 2007»
15 years 9 months ago
A 12-bit@40MS/s Gm-C Cascade 3-2 Continuous-Time Sigma-Delta Modulator
− This paper reports the transistor-level design of a 130-nm CMOS continuous-time cascade ΣΔ modulator. The modulator topology, directly synthesized in the continuous-time doma...
Ramon Tortosa Navas, Antonio Aceituno, José...
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
15 years 8 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
ASPDAC
2012
ACM
334views Hardware» more  ASPDAC 2012»
13 years 11 months ago
GreenDroid: An architecture for the Dark Silicon Age
— The Dark Silicon Age kicked off with the transition to multicore and will be characterized by a wild chase for seemingly ever-more insane architectural designs. At the heart o...
Nathan Goulding-Hotta, Jack Sampson, Qiaoshi Zheng...
ICCD
2004
IEEE
128views Hardware» more  ICCD 2004»
16 years 10 days ago
Static Transition Probability Analysis Under Uncertainty
Deterministic gate delay models have been widely used to find the transition probabilities at the nodes of a circuit for calculating the power dissipation. However, with progress...
Siddharth Garg, Siddharth Tata, Ravishankar Arunac...