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» Hardware Accelerated Power Estimation
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104
Voted
ISLPED
1997
ACM
83views Hardware» more  ISLPED 1997»
15 years 7 months ago
A symbolic algorithm for low-power sequential synthesis
We present an algorithm that restructures the state transition graph STG of a sequential circuit so as to reduce power dissipation. The STG is modi ed without changing the behav...
Balakrishna Kumthekar, In-Ho Moon, Fabio Somenzi
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
15 years 5 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
143
Voted
ASPDAC
2008
ACM
119views Hardware» more  ASPDAC 2008»
15 years 5 months ago
A stochastic local hot spot alerting technique
- With the increasing levels of variability in the behavior of manufactured nano-scale devices and dramatic changes in the power density on a chip, timely identification of hot spo...
Hwisung Jung, Massoud Pedram
97
Voted
ASAP
2007
IEEE
109views Hardware» more  ASAP 2007»
15 years 5 months ago
Long Live Small Fan-in Majority Gates Their Reign Looks Like Coming!
This paper explores the reliability of three different minimum fan-in majority gates full adder (FA) designs, and compares them to the performance of a standard XOR-based FA. The ...
Walid Ibrahim, Valeriu Beiu
142
Voted
ASPDAC
2006
ACM
157views Hardware» more  ASPDAC 2006»
15 years 9 months ago
Delay modeling and static timing analysis for MTCMOS circuits
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Naoaki Ohkubo, Kimiyoshi Usami