Sciweavers

550 search results - page 91 / 110
» Hardware Accelerated Power Estimation
Sort
View
124
Voted
ICMCS
2006
IEEE
141views Multimedia» more  ICMCS 2006»
15 years 9 months ago
Scalability of Multimedia Applications on Next-Generation Processors
In the near future, the majority of personal computers are expected to have several processing units. This is referred to as Core Multiprocessing (CMP). Furthermore, each of the c...
Guy Amit, Yaron Caspi, Ran Vitale, Adi Pinhas
KBSE
2007
IEEE
15 years 9 months ago
An energy consumption framework for distributed java-based systems
In this paper we present a framework for estimating the energy consumption of Java-based software systems. Our primary objective is to enable an engineer to make informed decision...
Chiyoung Seo, Sam Malek, Nenad Medvidovic
144
Voted
SIGMETRICS
2011
ACM
161views Hardware» more  SIGMETRICS 2011»
14 years 6 months ago
Modeling program resource demand using inherent program characteristics
The workloads in modern Chip-multiprocessors (CMP) are becoming increasingly diversified, creating different resource demands on hardware substrate. It is necessary to allocate h...
Jian Chen, Lizy Kurian John, Dimitris Kaseridis
IEEEPACT
2008
IEEE
15 years 9 months ago
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aa...
169
Voted
ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
14 years 7 months ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...