Commercial SRAM-based FPGAs have the potential to provide aerospace applications with the necessary performance to meet next-generation mission requirements. However, the suscepti...
Efficient use of an optimized memory hierarchy to exploit temporal locality in the memory accesses on array signals can have a very large impact on the power consumption in data ...
Jean-Philippe Diguet, Sven Wuytack, Francky Cattho...
- The objective of this paper is to provide an effective technique for accurate modeling of the external input sequences that affect the behavior of Finite State Machines (FSMs). B...
This paper presents a parallel hardware implementation of a well-known navigation control method on reconfigurable digital circuits. Trajectories are estimated after an iterated ...
High performance processors use checkpointing to rapidly recover from branch mispredictions and possibly other exceptions. We demonstrate that conventional checkpointing becomes u...