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» Hardware Architecture of a Parallel Pattern Matching Engine
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ICNP
2006
IEEE
15 years 3 months ago
High Speed Pattern Matching for Network IDS/IPS
— The phenomenal growth of the Internet in the last decade and society’s increasing dependence on it has brought along, a flood of security attacks on the networking and compu...
Mansoor Alicherry, Muthusrinivasan Muthuprasanna, ...
MSWIM
2006
ACM
15 years 3 months ago
Pattern matching based link quality prediction in wireless mobile ad hoc networks
As mobile devices, such as laptops, PDAs or mobile phones, are getting more and more ubiquitous and are able to communicate with each other via wireless technologies, the paradigm...
Károly Farkas, Theus Hossmann, Lukas Ruf, B...
DATE
2009
IEEE
129views Hardware» more  DATE 2009»
15 years 4 months ago
Exploring parallelizations of applications for MPSoC platforms using MPA
—This paper presents a tool for exploring different parallelization options for an application. It can be used to quickly find a high-quality match between an application and a ...
Rogier Baert, Erik Brockmeyer, Sven Wuytack, Thoma...
IPPS
2010
IEEE
14 years 6 months ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz
CAMP
2005
IEEE
15 years 3 months ago
Speeding-up NCC-Based Template Matching Using Parallel Multimedia Instructions
— This paper describes the mapping of a recently introduced template matching algorithm based on the Normalized Cross Correlation (NCC) on a general purpose processor endowed wit...
Luigi di Stefano, Stefano Mattoccia, Federico Tomb...