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» Hardware Architecture of a Parallel Pattern Matching Engine
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IPPS
2003
IEEE
15 years 2 months ago
Effective Utilization and Reconfiguration of Distributed Hardware Resources Using Job Management Systems
Reconfigurable hardware resources are very expensive, and yet can be underutilized. This paper describes a middleware capable of discovering underutilized computing nodes with FPG...
Kris Gaj, Tarek A. El-Ghazawi, Nikitas A. Alexandr...
79
Voted
IPPS
2009
IEEE
15 years 4 months ago
A component-based framework for the Cell Broadband Engine
With the increasing trend of microprocessor manufacturers to rely on parallelism to increase their products’ performance, there is an associated increasing need for simple techn...
Timothy D. R. Hartley, Ümit V. Çataly&...
DATE
2006
IEEE
109views Hardware» more  DATE 2006»
15 years 3 months ago
A methodology for mapping multiple use-cases onto networks on chips
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
Srinivasan Murali, Martijn Coenen, Andrei Radulesc...
85
Voted
SSPR
2004
Springer
15 years 3 months ago
Matching Concavity Trees
Concavity trees are structures for 2-D shape representation. In this paper, we present a new recursive method for concavity tree matching that returns the distance between two attr...
Ossama El Badawy, Mohamed Kamel
TC
2010
14 years 8 months ago
Network-on-Chip Hardware Accelerators for Biological Sequence Alignment
—The most pervasive compute operation carried out in almost all bioinformatics applications is pairwise sequence homology detection (or sequence alignment). Due to exponentially ...
Souradip Sarkar, Gaurav Ramesh Kulkarni, Partha Pr...