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» Hardware Architecture of a Parallel Pattern Matching Engine
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CCGRID
2004
IEEE
15 years 1 months ago
Capability matching of data streams with network services
Distributed computing middleware needs to support a wide range of resources, such as diverse software components, various hardware devices, and heterogeneous operating systems and...
Han Gao, Ivan R. Judson, Thomas D. Uram, Terry Dis...
FPL
2008
Springer
116views Hardware» more  FPL 2008»
14 years 11 months ago
NOC architecture design for multi-cluster chips
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...
DATE
2005
IEEE
118views Hardware» more  DATE 2005»
15 years 3 months ago
Energy- and Performance-Driven NoC Communication Architecture Synthesis Using a Decomposition Approach
In this paper, we present a methodology for customized communication architecture synthesis that matches the communication requirements of the target application. This is an impor...
Ümit Y. Ogras, Radu Marculescu
ISORC
2008
IEEE
15 years 4 months ago
Hardware Objects for Java
Java, as a safe and platform independent language, avoids access to low-level I/O devices or direct memory access. In standard Java, low-level I/O it not a concern; it is handled ...
Martin Schoeberl, Christian Thalinger, Stephan Kor...
VLSISP
2008
173views more  VLSISP 2008»
14 years 9 months ago
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
Yedidya Hilewitz, Ruby B. Lee