365 search results - page 48 / 73 » Hardware Architecture of a Parallel Pattern Matching Engine |
234
Voted
ICCD
2005
IEEE
16 years 28 days ago
2005
IEEE
As power density increases exponentially, run-time regulation of operating temperature by dynamic thermal management becomes imperative. This paper proposes a novel approach to re...
232
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IPPS
1998
IEEE
15 years 11 months ago
1998
IEEE
Traditionally, tracking systems require dedicated hardware to handle the computational demands and input/output rates imposed by real-time video sources. An alternative presented i...
157
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ICCAD
2005
IEEE
16 years 4 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
204
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IEEEPACT
2002
IEEE
16 years 8 days ago
2002
IEEE
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
236
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WOB
2004
15 years 8 months ago
2004
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...