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» Hardware Architecture of a Parallel Pattern Matching Engine
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ICCD
2005
IEEE
131views Hardware» more  ICCD 2005»
15 years 3 months ago
Efficient Thermal Simulation for Run-Time Temperature Tracking and Management
As power density increases exponentially, run-time regulation of operating temperature by dynamic thermal management becomes imperative. This paper proposes a novel approach to re...
Hang Li, Pu Liu, Zhenyu Qi, Lingling Jin, Wei Wu, ...
95
Voted
IPPS
1998
IEEE
15 years 1 months ago
A Configurable Computing Approach Towards Real-Time Target Tracking
Traditionally, tracking systems require dedicated hardware to handle the computational demands and input/output rates imposed by real-time video sources. An alternative presented i...
Bharadwaj Pudipeddi, A. Lynn Abbott, Peter M. Atha...
ICCAD
2005
IEEE
131views Hardware» more  ICCAD 2005»
15 years 6 months ago
Code restructuring for improving cache performance of MPSoCs
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
Guilin Chen, Mahmut T. Kandemir
101
Voted
IEEEPACT
2002
IEEE
15 years 2 months ago
Using the Compiler to Improve Cache Replacement Decisions
Memory performance is increasingly determining microprocessor performance and technology trends are exacerbating this problem. Most architectures use set-associative caches with L...
Zhenlin Wang, Kathryn S. McKinley, Arnold L. Rosen...
WOB
2004
120views Bioinformatics» more  WOB 2004»
14 years 11 months ago
Reconfigurable Systems for Sequence Alignment and for General Dynamic Programming
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...
Ricardo P. Jacobi, Mauricio Ayala-Rincón, L...