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» Hardware Architecture of a Parallel Pattern Matching Engine
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PPOPP
2003
ACM
15 years 2 months ago
Exploiting high-level coherence information to optimize distributed shared state
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating ...
DeQing Chen, Chunqiang Tang, Brandon Sanders, Sand...
85
Voted
ISHPC
2000
Springer
15 years 1 months ago
Loop Termination Prediction
Deeply pipelined high performance processors require highly accurate branch prediction to drive their instruction fetch. However there remains a class of events which are not easi...
Timothy Sherwood, Brad Calder
CCGRID
2010
IEEE
14 years 8 months ago
An Adaptive Data Prefetcher for High-Performance Processors
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...
Yong Chen, Huaiyu Zhu, Xian-He Sun
MIDDLEWARE
2007
Springer
15 years 3 months ago
Promoting levels of openness on component-based adaptable middleware
It is widely accepted that middleware is an important architectural element which facilitates the development of software systems. In this paper we propose a novel approach for de...
Tarcisio da Rocha, Anna-Brith Arntsen, Arne Ketil ...
EGH
2004
Springer
15 years 3 months ago
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo