Sciweavers

193 search results - page 25 / 39
» Hardware Implementations of Artificial Neural Networks
Sort
View
DSD
2007
IEEE
150views Hardware» more  DSD 2007»
15 years 6 months ago
Adaptive Distance Estimation and Localization in WSN using RSSI Measures
Abstract—Localization is one of the most challenging and important issues in wireless sensor networks (WSNs), especially if cost-effective approaches are demanded. In this paper,...
Abdalkarim Awad, Thorsten Frunzke, Falko Dressler
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
15 years 3 hour ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
IJCNN
2007
IEEE
15 years 6 months ago
Theta Neuron Networks: Robustness to Noise in Embedded Applications
- In this paper, we train a one-layer Theta Neuron Network (TNN) to perform a Braitenberg obstacle avoidance algorithm on a Khepera robot. The Theta neuron model is more biological...
Sam McKennoch, Preethi Sundaradevan, Linda G. Bush...
ISNN
2005
Springer
15 years 5 months ago
FPGA Realization of a Radial Basis Function Based Nonlinear Channel Equalizer
In this paper we propose a radial basis function (RBF) neural network for nonlinear time-invariant channel equalizer. The RBF network model has a three-layer structure which is com...
Poyueh Chen, Hungming Tsai, ChengJian Lin, ChiYung...
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
15 years 4 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....