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147
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ICCAD
2003
IEEE
175views Hardware» more  ICCAD 2003»
15 years 11 months ago
Path Delay Estimation using Power Supply Transient Signals: A Comparative Study using Fourier and Wavelet Analysis
Transient Signal Analysis (TSA) is a parametric device testing technique based on the analysis of dynamic (transient) current (iDDT) drawn by the core logic from the power supply ...
Abhishek Singh, Jitin Tharian, Jim Plusquellic
150
Voted
CODES
1996
IEEE
15 years 6 months ago
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems
Performance modeling and evaluation of embedded hardware/software systems is important to help the CoDesign process. The hardware/software partitioning needs to be evaluated befor...
Jean Paul Calvez, Dominique Heller, Olivier Pasqui...
102
Voted
ASPDAC
2008
ACM
99views Hardware» more  ASPDAC 2008»
15 years 4 months ago
A delay model for interconnect trees based on ABCD matrix
- The accuracy of interconnect delay estimations can be improved by the method presented in this paper in which the first two moments are obtained with ABCD matrix and a stable mod...
Guofei Zhou, Li Su, Depeng Jin, Lieguang Zeng
ASPDAC
1995
ACM
111views Hardware» more  ASPDAC 1995»
15 years 6 months ago
A hardware-software co-simulator for embedded system design and debugging
One of the interesting problems in hardware-software co-design is that of debugging embedded software in conjunction with hardware. Currently, most software designers wait until a...
A. Ghosh, M. Bershteyn, R. Casley, C. Chien, A. Ja...
112
Voted
ICECCS
2006
IEEE
115views Hardware» more  ICECCS 2006»
15 years 8 months ago
A Layered Behavioural Model of Platelets
There is great interest in the application of nanotechnology to medicine, but concerns for safety are paramount. We present a modelling technique based on CSP and B as a starting ...
Steve Schneider, Helen Treharne, Ana Cavalcanti, J...