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VLSI
2007
Springer
15 years 3 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
EH
1999
IEEE
351views Hardware» more  EH 1999»
15 years 2 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
FDL
2005
IEEE
15 years 3 months ago
Meta Modelling of Embedded Systems using Active Databases
The development process of embedded systems is characterized by the cooperation of various domains: components of hardware and software have to be considered as well as components...
Dieter Monjau, Mathias Sporer
WABI
2009
Springer
117views Bioinformatics» more  WABI 2009»
15 years 4 months ago
A Simulation Study Comparing Supertree and Combined Analysis Methods Using SMIDGen
Background: Supertree methods comprise one approach to reconstructing large molecular phylogenies given multi-marker datasets: trees are estimated on each marker and then combined...
M. Shel Swenson, François Barbançon,...
ICCAD
2002
IEEE
108views Hardware» more  ICCAD 2002»
15 years 6 months ago
A precorrected-FFT method for simulating on-chip inductance
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...