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FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
15 years 11 months ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong
DAGM
2008
Springer
15 years 8 months ago
Sliding-Windows for Rapid Object Class Localization: A Parallel Technique
Abstract. This paper presents a fast object class localization framework implemented on a data parallel architecture currently available in recent computers. Our case study, the im...
Christian Wojek, Gyuri Dorkó, André ...
APCSAC
2007
IEEE
16 years 23 days ago
Implicit Transactional Memory in Kilo-Instruction Multiprocessors
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
Marco Galluzzi, Enrique Vallejo, Adrián Cri...
TASE
2010
IEEE
15 years 1 months ago
Optimization of Group Elevator Scheduling With Advance Information
Group elevator scheduling has received considerable attention due to its importance to transportation efficiency for mid-rise and high-rise buildings. One important trend to improv...
Jin Sun, Qianchuan Zhao, Peter B. Luh
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
16 years 3 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...