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69
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DATE
2006
IEEE
101views Hardware» more  DATE 2006»
15 years 3 months ago
Design with race-free hardware semantics
Most hardware description languages do not enforce determinacy, meaning that they may yield races. Race conditions pose a problem for the implementation, verification, and validat...
Patrick Schaumont, Sandeep K. Shukla, Ingrid Verba...
ISMVL
1994
IEEE
98views Hardware» more  ISMVL 1994»
15 years 1 months ago
Digital Circuit Verification Using Partially-Ordered State Models
Many aspects of digital circuit operation can be efficiently verified by simulating circuit operation over "weakened" state values. This technique has long been practice...
Carl-Johan H. Seger, Randal E. Bryant
ICCD
2005
IEEE
107views Hardware» more  ICCD 2005»
15 years 6 months ago
Hardware Support for Bulk Data Movement in Server Platforms
Bulk data movement occurs commonly in server workloads and their performance is rather poor on today’s microprocessors. We propose the use of small dedicated copy engines, and p...
Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. ...
77
Voted
WSC
2000
14 years 11 months ago
Quasi-Monte Carlo methods in cash flow testing simulations
What actuaries call cash flow testing is a large-scale simulation pitting a company's current policy obligation against future earnings based on interest rates. While life co...
Michael G. Hilgers
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
15 years 4 months ago
New simulation methodology of 3D surface roughness loss for interconnects modeling
— As clock frequencies exceed giga-Hertz, the extra power loss due to conductor surface roughness in interconnects and packagings is more evident and thus demands a proper accou...
Quan Chen, Ngai Wong