4074 search results - page 692 / 815 » Hardware Modelling and Simulation Using an Object-Oriented M... |
118
Voted
HPDC
2008
IEEE
15 years 9 months ago
2008
IEEE
Ever more scientists are employing large-scale distributed systems such as grids for their computational work, instead of tightly coupled high-performance computing systems. Howev...
128
click to vote
ICRA
2005
IEEE
15 years 8 months ago
2005
IEEE
— Recently, there has been a growing interest in biologically inspired biped locomotion control with Central Pattern Generator (CPG). However, few experimental attempts on real h...
133
Voted
PLDI
1995
ACM
15 years 6 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
123
Voted
EUROPAR
2010
Springer
15 years 3 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
156
Voted
IPPS
2010
IEEE
15 years 14 days ago
2010
IEEE
There is building interest in using FPGAs as accelerators for high-performance computing, but existing systems for programming them are so far inadequate. In this paper we propose...