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ICCAD
2004
IEEE
15 years 6 months ago
2004
IEEE
This paper presents a chip-level charged device model (CDM) electrostatic discharge (ESD) simulation method. The chip-level simulation is formulated as a DC analysis problem. A ne...
DSD
2005
IEEE
15 years 3 months ago
2005
IEEE
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
VTS
1997
IEEE
15 years 1 months ago
1997
IEEE
Accumulators based on addition or subtraction can be used as test pattern generators. Some circuits, however, require long test lengths if the parameters of the accumulator are no...
ISCAS
2008
IEEE
15 years 4 months ago
2008
IEEE
— An accurate and efficient solution for the transient response at the far end of a transmission line is proposed in this paper. Unlike approximating the poles by truncating the...
LCTRTS
1998
Springer
15 years 2 months ago
1998
Springer
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...