Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation te...
Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhr...
Database engines face growing scalability challenges as core counts exponentially increase each processor generation, and the efficiency of synchronization primitives used to prot...
Ryan Johnson, Manos Athanassoulis, Radu Stoica, An...
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
Michael Hutton, Richard Yuan, Jay Schleicher, Greg...
In this paper, we suggest a block-restricted sifting strategy which is based on the restriction of Rudell's sifting to certain blocks of variables. The application of this st...
—Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architec...
Vasileios Karakasis, Georgios I. Goumas, Nectarios...