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DAC
2011
ACM
13 years 11 months ago
Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect
Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation te...
Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhr...
118
Voted
DAMON
2009
Springer
15 years 6 months ago
A new look at the roles of spinning and blocking
Database engines face growing scalability challenges as core counts exponentially increase each processor generation, and the efficiency of synchronization primitives used to prot...
Ryan Johnson, Manos Athanassoulis, Radu Stoica, An...
DATE
2006
IEEE
96views Hardware» more  DATE 2006»
15 years 5 months ago
A methodology for FPGA to structured-ASIC synthesis and verification
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
Michael Hutton, Richard Yuan, Jay Schleicher, Greg...
73
Voted
ICCD
1997
IEEE
78views Hardware» more  ICCD 1997»
15 years 3 months ago
Speeding up Variable Reordering of OBDDs
In this paper, we suggest a block-restricted sifting strategy which is based on the restriction of Rudell's sifting to certain blocks of variables. The application of this st...
Christoph Meinel, Anna Slobodová
ICPP
2009
IEEE
15 years 6 months ago
Perfomance Models for Blocked Sparse Matrix-Vector Multiplication Kernels
—Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architec...
Vasileios Karakasis, Georgios I. Goumas, Nectarios...