Sciweavers

163 search results - page 16 / 33
» Hardware Performance Characterization of Block Cipher Struct...
Sort
View
ITNG
2010
IEEE
14 years 10 months ago
Record Setting Software Implementation of DES Using CUDA
—The increase in computational power of off-the-shelf hardware offers more and more advantageous tradeoffs among efficiency, cost and availability, thus enhancing the feasibil...
Giovanni Agosta, Alessandro Barenghi, Fabrizio De ...
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
15 years 6 months ago
Optimal MTCMOS Reactivation Under Power Supply Noise and Performance Constraints
Sleep transistor insertion is one of today’s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle powe...
Andrea Calimera, Luca Benini, Enrico Macii
ICCAD
2003
IEEE
204views Hardware» more  ICCAD 2003»
15 years 8 months ago
Modeling of Ballistic Carbon Nanotube Field Effect Transistors for Efficient Circuit Simulation
Carbon Nanotube Field-Effect Transistors (CNFETs) are being extensively studied as possible successors to CMOS. Novel device structures have been fabricated and device simulators ...
Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik ...
ISCAS
2008
IEEE
89views Hardware» more  ISCAS 2008»
15 years 6 months ago
Multi-loop efficient sturdy MASH delta-sigma modulators
— An extended version of sturdy MASH delta-sigma modulators is presented in this paper. Improved performance is achieved using in-band zero optimization. The challenges towards h...
Nima Maghari, Un-Ku Moon
ISMVL
1997
IEEE
134views Hardware» more  ISMVL 1997»
15 years 3 months ago
Functional Decomposition of MVL Functions Using Multi-Valued Decision Diagrams
In this paper, the minimization of incompletely specified multi-valued functions using functional decomposition is discussed. From the aspect of machine learning, learning sample...
Craig M. Files, Rolf Drechsler, Marek A. Perkowski