Sciweavers

308 search results - page 26 / 62
» Hardware Reconfigurable Neural Networks
Sort
View
JCP
2008
126views more  JCP 2008»
14 years 9 months ago
Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...
Shouling He, Xuping Xu
ISCAS
2006
IEEE
70views Hardware» more  ISCAS 2006»
15 years 3 months ago
Power aware learning for class AB analogue VLSI neural network
—Recent research into artificial neural networks (ANN) has highlighted the potential of using compact analogue ANN hardware cores in embedded mobile devices, where power consumpt...
S. S. Modi, P. R. Wilson, A. D. Brown
103
Voted
ESANN
2006
14 years 11 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout
ICES
2001
Springer
140views Hardware» more  ICES 2001»
15 years 2 months ago
A VLSI Implementation of an Analog Neural Network Suited for Genetic Algorithms
The usefulness of an artificial analog neural network is closely bound to its trainability. This paper introduces a new analog neural network architecture using weights determined...
Johannes Schemmel, Karlheinz Meier, Felix Schü...
DATE
2003
IEEE
114views Hardware» more  DATE 2003»
15 years 2 months ago
Extraction of Piecewise-Linear Analog Circuit Models from Trained Neural Networks Using Hidden Neuron Clustering
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...
Simona Doboli, Gaurav Gothoskar, Alex Doboli