Sciweavers

308 search results - page 49 / 62
» Hardware Reconfigurable Neural Networks
Sort
View
71
Voted
ICT
2004
Springer
131views Communications» more  ICT 2004»
15 years 3 months ago
Fairness and Protection Behavior of Resilient Packet Ring Nodes Using Network Processors
The Resilient Packet Ring IEEE 802.17 is an evolving standard for the construction of Local and Metropolitan Area Networks. The RPR protocol scales to the demands of future packet ...
Andreas Kirstädter, Axel Hof, Walter Meyer, E...
IWANN
2001
Springer
15 years 2 months ago
From Embryonics to POEtic Machines
The space of bio-inspired hardware can be partitioned along three axes: phylogeny, ontogeny, and epigenesis. We refer to this as the POE model. Our Embryonics (for embryonic electr...
Daniel Mange, André Stauffer, Gianluca Temp...
IJCNN
2000
IEEE
15 years 2 months ago
A 2D Neuromorphic VLSI Architecture for Modeling Selective Attention
Selectiveattentionis a mechanismsused to sequentiallyselectthe spatiallocationsof salientregionsin the sensor’sfieldof view. This mechanism overcomesthe problem of flooding limi...
Giacomo Indiveri
ICANN
1997
Springer
15 years 1 months ago
Real-Time Analog VLSI Sensors for 2-D Direction of Motion
Optical ow elds are a primary source of information about the visual scene in technical and biological systems. In a step towards a system for real time scene analysis we have deve...
Rainer A. Deutschmann, Charles M. Higgins, Christo...
ESANN
2008
14 years 11 months ago
Pruning and Regularisation in Reservoir Computing: a First Insight
Reservoir Computing is a new paradigm for using Recurrent Neural Networks which shows promising results. However, as the recurrent part is created randomly, it typically needs to b...
Xavier Dutoit, Benjamin Schrauwen, Jan M. Van Camp...