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» Hardware Reuse at the Behavioral Level
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DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 1 months ago
Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach
Future Systems-on-Chips will include multiple heterogeneous processing units, with complex data-dependent shared resource access patterns dictating the performance of a design. Cu...
Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, ...
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 1 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
DRM
2005
Springer
15 years 3 months ago
Towards a software architecture for DRM
The domain of digital rights management (DRM) is currently lacking a generic architecture that supports interoperability and reuse of specific DRM technologies. This lack of arch...
Sam Michiels, Kristof Verslype, Wouter Joosen, Bar...
55
Voted
ICCAD
2003
IEEE
98views Hardware» more  ICCAD 2003»
15 years 6 months ago
Achieving Design Closure Through Delay Relaxation Parameter
Current design automation methodologies are becoming incapable of achieving design closure especially in the presence of deep submicron effects. This paper addresses the issue of ...
Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Cho...
ICCAD
2001
IEEE
272views Hardware» more  ICCAD 2001»
15 years 6 months ago
NetBench: A Benchmarking Suite for Network Processors
— In this study we introduce NetBench, a benchmarking suite for network processors. NetBench contains a total of 9 applications that are representative of commercial applications...
Gokhan Memik, William H. Mangione-Smith, Wendong H...