398 search results - page 56 / 80 » Hardware Reuse at the Behavioral Level |
95
Voted
LCTRTS
2010
Springer
14 years 7 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
100
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DAC
2005
ACM
15 years 10 months ago
2005
ACM
Small, embedded integrated circuits (ICs) such as smart cards are vulnerable to so-called side-channel attacks (SCAs). The attacker can gain information by monitoring the power co...
67
Voted
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
ITC
1995
IEEE
15 years 1 months ago
1995
IEEE
A nalog circuit implementations of fuzzy logic are characterized by performing logical connectives of analog signals. They can be considered as generalization of digital circuits ...
ICCD
2003
IEEE
15 years 6 months ago
2003
IEEE
With the circuit density available in today’s ASIC design systems, increased integration is possible creating more complexity in the design of a System on a Chip (SoC). IBM’s ...