398 search results - page 59 / 80 » Hardware Reuse at the Behavioral Level |
DSN
2007
IEEE
15 years 1 months ago
2007
IEEE
We consider cluster systems with multiple nodes where each server is prone to run tasks at a degraded level of service due to some software or hardware fault. The cluster serves t...
TOMS
1998
14 years 9 months ago
1998
This paper presents the software architecture and implementation of the problem solving environment (PSE) PELLPACK for modeling physical objects described by partial differential ...
IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Abstract-- Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors. The cache par...
71
Voted
ICCAD
2007
IEEE
15 years 6 months ago
2007
IEEE
Abstract— This paper addresses the module assignment problem in pinlimited designs under the stacked-Vdd circuit paradigm. A partition-based algorithm is presented for efficient...
ICCAD
2000
IEEE
15 years 2 months ago
2000
IEEE
Spurred by technology leading to the availability of millions of gates per chip, system-level integration is evolving as a new paradigm, allowing entire systems to be built on a s...