398 search results - page 6 / 80 » Hardware Reuse at the Behavioral Level |
155
click to vote
ICCD
1992
IEEE
15 years 5 months ago
1992
IEEE
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
135
click to vote
VLSID
2005
IEEE
16 years 2 months ago
2005
IEEE
High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
DATE
2000
IEEE
15 years 6 months ago
2000
IEEE
: We address the issue of standards development for the system-level design space. System-level design IP re-use standards are key to the future of the VSIA. However, the concept o...
TACO
2008
15 years 1 months ago
2008
r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
109
click to vote
ISORC
2002
IEEE
15 years 6 months ago
2002
IEEE
Monitoring is a widely-used technique to check assumptions about the real-time behavior of a system, debug the code, or enforce the system to react if certain deadlines are passed...