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ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
14 years 11 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
CODES
2002
IEEE
15 years 4 months ago
Compiler-directed customization of ASIP cores
This paper presents an automatic method to customize embedded application-specific instruction processors (ASIPs) based on compiler analysis. ASIPs, also known as embedded soft c...
T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua
98
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ASPLOS
2006
ACM
15 years 5 months ago
Architectural support for software-based protection
Control-Flow Integrity (CFI) is a property that guarantees program control flow cannot be subverted by a malicious adversary, even if the adversary has complete control of data m...
Mihai Budiu, Úlfar Erlingsson, Martí...
CASES
2005
ACM
15 years 1 months ago
Exploring the design space of LUT-based transparent accelerators
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...
Sami Yehia, Nathan Clark, Scott A. Mahlke, Kriszti...
TCAD
2010
90views more  TCAD 2010»
14 years 6 months ago
Fast, Nearly Optimal ISE Identification With I/O Serialization Through Maximal Clique Enumeration
The last decade has witnessed the emergence of the application-specific instruction-set processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user ...
Ajay K. Verma, Philip Brisk, Paolo Ienne