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HIPEAC
2010
Springer
15 years 1 months ago
Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions
Abstract. Customizable processors augmented with application-specific Instruction Set Extensions (ISEs) have begun to gain traction in recent years. The most effective ISEs include...
Theo Kluter, Samuel Burri, Philip Brisk, Edoardo C...
80
Voted
DATE
2010
IEEE
204views Hardware» more  DATE 2010»
15 years 4 months ago
Assertion-based verification of RTOS properties
— Today, mobile and embedded real time systems have to cope with the migration and allocation of multiple software tasks running on top of a real time operating system (RTOS) res...
Marcio F. S. Oliveira, Henning Zabel, Wolfgang M&u...
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
15 years 5 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
15 years 4 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
CASES
2005
ACM
15 years 1 months ago
Hardware support for code integrity in embedded processors
Computer security becomes increasingly important with continual growth of the number of interconnected computing platforms. Moreover, as capabilities of embedded processors increa...
Milena Milenkovic, Aleksandar Milenkovic, Emil Jov...