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» Hardware Support for Control Transfers in Code Caches
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STORAGESS
2005
ACM
15 years 7 months ago
An electric fence for kernel buffers
Improper access of data buffers is one of the most common errors in programs written in assembler, C, C++, and several other languages. Existing programs and OSs frequently acces...
Nikolai Joukov, Aditya Kashyap, Gopalan Sivathanu,...
CIDR
2009
167views Algorithms» more  CIDR 2009»
15 years 2 months ago
Unbundling Transaction Services in the Cloud
The traditional architecture for a DBMS engine has the recovery, concurrency control and access method code tightly bound together in a storage engine for records. We propose a di...
David B. Lomet, Alan Fekete, Gerhard Weikum, Micha...
CCS
2007
ACM
15 years 8 months ago
Hardware-rooted trust for secure key management and transient trust
We propose minimalist new hardware additions to a microprocessor chip that protect cryptographic keys in portable computing devices which are used in the field but owned by a cen...
Jeffrey S. Dwoskin, Ruby B. Lee
ASPLOS
2010
ACM
15 years 8 months ago
COMPASS: a programmable data prefetcher using idle GPU shaders
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores...
Dong Hyuk Woo, Hsien-Hsin S. Lee
HPN
1992
15 years 3 months ago
A Host Interface Architecture for High-Speed Networks
This paper describes a new host interface architecture for high-speed networks operating at 800 of Mbit/second or higher rates. The architecture is targeted to achieve several 100...
Peter Steenkiste, Brian Zill, H. T. Kung, Steven S...