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» Hardware Support for Secure Processing in Embedded Systems
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VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
16 years 4 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
ISCA
2010
IEEE
284views Hardware» more  ISCA 2010»
15 years 9 months ago
Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address
Phase change memory (PCM) is an emerging memory technology for future computing systems. Compared to other non-volatile memory alternatives, PCM is more matured to production, and...
Nak Hee Seong, Dong Hyuk Woo, Hsien-Hsin S. Lee
MAM
2007
113views more  MAM 2007»
15 years 4 months ago
A reconfigurable computing framework for multi-scale cellular image processing
Cellular computing architectures represent an important class of computation that are characterized by simple processing elements, local interconnect and massive parallelism. Thes...
Reid B. Porter, Jan R. Frigo, Al Conti, Neal R. Ha...
SAFECOMP
2005
Springer
15 years 10 months ago
Problem Frames and Architectures for Security Problems
Abstract. We present several problem frames that serve to structure, characterize and analyze software development problems in the area of software and system security. These probl...
Denis Hatebur, Maritta Heisel
CODES
2003
IEEE
15 years 9 months ago
Design space minimization with timing and code size optimization for embedded DSP
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
Qingfeng Zhuge, Zili Shao, Bin Xiao, Edwin Hsing-M...