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FPL
2003
Springer
81views Hardware» more  FPL 2003»
15 years 9 months ago
Software Decelerators
This paper introduces the notion of a software decelerator, to be used in logic-centric system architectures. Functions are offloaded from logic to a processor, accepting a speed ...
Eric Keller, Gordon J. Brebner, Philip James-Roxby
CASES
2006
ACM
15 years 10 months ago
Mitigating soft error failures for multimedia applications by selective data protection
With advances in process technology, soft errors (SE) are becoming an increasingly critical design concern. Due to their large area and high density, caches are worst hit by soft ...
Kyoungwoo Lee, Aviral Shrivastava, Ilya Issenin, N...
SAMOS
2010
Springer
15 years 2 months ago
Power aware heterogeneous MPSoC with dynamic task scheduling and increased data locality for multiple applications
A new heterogeneous multiprocessor system with dynamic memory and power management for improved performance and power consumption is presented. Increased data locality is automatic...
Oliver Arnold, Gerhard Fettweis
WORDS
2003
IEEE
15 years 9 months ago
Weaving Aspects into Real-Time Operating System Design Using Object-Oriented Model Transformation
Despite of the proliferation of object-oriented and component technology, their application to real-time operating systems (RTOS) has been limited since most design concerns in RT...
Jiyong Park, Saehwa Kim, Seongsoo Hong
DAC
1997
ACM
15 years 8 months ago
CELLERITY: A Fully Automatic Layout Synthesis System for Standard Cell Libraries
This paper describes a fully automatic standard-cell layout synthesis system, CELLERITY. The system is flexible in supporting a wide variety of process technologies and a range of...
Mohankumar Guruswamy, Robert L. Maziasz, Daniel Du...