1737 search results - page 52 / 348 » Hardware Support for Secure Processing in Embedded Systems |
134
Voted
DSD
2006
IEEE
15 years 9 months ago
2006
IEEE
In this paper we present an approach for the mapping optimization of fault-tolerant embedded systems for safetycritical applications. Processes and messages are statically schedul...
124
Voted
FPL
2005
Springer
15 years 9 months ago
2005
Springer
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
137
Voted
ISCAS
2003
IEEE
15 years 9 months ago
2003
IEEE
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
145
Voted
IEEECIT
2006
IEEE
15 years 9 months ago
2006
IEEE
This paper argues about the partitioning in hardware/software co-design and suggests the methodology applying extreme programming to complement the co-design. This approach, contr...
135
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CSREAESA
2006
15 years 5 months ago
2006
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...