Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
In this paper, we introduce the model REMES for formal modeling and analysis of embedded resources such as storage, energy, communication, and computation. The model is a state-ma...
This paper considers the problem of designing heterogeneous multiprocessor embedded systems. The focus is on a step of the design flow: the definition of innovative metrics for th...
Donatella Sciuto, Fabio Salice, Luigi Pomante, Wil...
Embedded systems in safety-critical environments demand safety guarantees while providing many useful services that are too complex to formally verify or fully test. Existing appl...
Stanley Bak, Deepti K. Chivukula, Olugbemiga Adeku...