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» Hardware Support for Secure Processing in Embedded Systems
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ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
15 years 9 months ago
Signal processing for brain-computer interface: enhance feature extraction and classification
Abstract-In this paper we present a new scheme for brain imaginary movement invovles sophisticated spatial-temporalsignal processing and classification for electroencephalogram spe...
Haihong Zhang, Cuntai Guan, Yuanqing Li
CODES
2010
IEEE
15 years 16 days ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
15 years 8 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
CODES
2006
IEEE
15 years 10 months ago
The pipeline decomposition tree: : an analysis tool for multiprocessor implementation of image processing applications
Modern embedded systems for image processing involve increasingly complex levels of functionality under real-time and resourcerelated constraints. As this complexity increases, th...
Dong-Ik Ko, Shuvra S. Bhattacharyya
CARDIS
2006
Springer
146views Hardware» more  CARDIS 2006»
15 years 7 months ago
SEA: A Scalable Encryption Algorithm for Small Embedded Applications
Most present symmetric encryption algorithms result from a tradeoff between implementation cost and resulting performances. In addition, they generally aim to be implemented effici...
François-Xavier Standaert, Gilles Piret, Ne...