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» Hardware Support for Secure Processing in Embedded Systems
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DATE
2009
IEEE
189views Hardware» more  DATE 2009»
15 years 10 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
WISES
2003
15 years 5 months ago
Using a Java Optimized Processor in a Real World Application
— Java, a popular programming language on desktop systems, is rarely used in embedded systems. Some features of Java, like thread support in the language, could greatly simplify ...
Martin Schoeberl
CASES
2005
ACM
15 years 5 months ago
SECA: security-enhanced communication architecture
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
Joel Coburn, Srivaths Ravi, Anand Raghunathan, Sri...
DAC
2005
ACM
16 years 4 months ago
High performance encryption cores for 3G networks
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
René Cumplido, Tomás Balderas-Contre...
DATE
2010
IEEE
120views Hardware» more  DATE 2010»
15 years 9 months ago
Linear programming approach for performance-driven data aggregation in networks of embedded sensors
Abstract—Cyber Physical Systems are distributed systemsof-systems that integrate sensing, processing, networking and actuation. Aggregating physical data over space and in time e...
Cristian Ferent, Varun Subramanian, Michael Gilber...