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FCCM
2004
IEEE
118views VLSI» more  FCCM 2004»
15 years 1 months ago
Virtual Memory Window for a Portable Reconfigurable Cryptography Coprocessor
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
IMC
2010
ACM
14 years 7 months ago
High speed network traffic analysis with commodity multi-core systems
Multi-core systems are the current dominant trend in computer processors. However, kernel network layers often do not fully exploit multi-core architectures. This is due to issues...
Francesco Fusco, Luca Deri
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
15 years 3 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
IWMM
2011
Springer
245views Hardware» more  IWMM 2011»
14 years 15 days ago
Waste not, want not: resource-based garbage collection in a shared environment
To achieve optimal performance, garbage-collected applications must balance the sizes of their heaps dynamically. Sizing the heap too small can reduce throughput by increasing the...
Matthew Hertz, Stephen Kane, Elizabeth Keudel, Ton...
CAV
1998
Springer
175views Hardware» more  CAV 1998»
15 years 1 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore