681 search results - page 118 / 137 » Hardware Synthesis Using SAFL and Application to Processor D... |
102
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RSP
2000
IEEE
15 years 2 months ago
2000
IEEE
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
117
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TVLSI
2010
14 years 4 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
ISCA
2005
IEEE
15 years 3 months ago
2005
IEEE
Coherent read misses in shared-memory multiprocessors account for a substantial fraction of execution time in many important scientific and commercial workloads. We propose Tempor...