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ISCA
2010
IEEE
14 years 11 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
FPL
2009
Springer
15 years 2 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
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IPPS
2009
IEEE
15 years 4 months ago
2009
IEEE
With the increasing trend of microprocessor manufacturers to rely on parallelism to increase their products’ performance, there is an associated increasing need for simple techn...
MICRO
1998
IEEE
15 years 1 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
OSDI
2008
ACM
15 years 10 months ago
2008
ACM
Multiprocessor application performance can be limited by the operating system when the application uses the operating system frequently and the operating system services use data ...